Penyelia 1
Penyelia 2
Siapa pelajar nie ye?
SILA AMBIL PERHATIAN: 3 Disember 2007 - 2 Disember 2010
This research will explore basically into three main areas; High Definition Television (HDTV), COder-DECoders (Codecs) for video compression on output video bit rates and the Very Large Scale Integration (VLSI) for low-power design architecture. Digital television was introduced as an improvement over analogue television, offering High Definition Television (HDTV); an increased number of programmes offered with existing channels; broadcast to low-power, portable devices; reception in moving vehicles; and distribution over alternative telecommunications networks, including the Internet. VLSI architecture part will focus on the software and hardware approaches to power reduction and battery management since this issue are becoming essential, leading to low-power codecs. In some cases, the low-power techniques are standalone. In others, the techniques are tied to the underlying hardware and power consumption reductions may be relative to that hardware.
Task 1: Find any "master paper" from any refereed journal (IEEE)
Task 2: Find the modelling instrument - maybe using MATLAB
Task 3: Try to explore - FPGA for testing
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